EP1SGX25FF1020C6N vs EP1SGX25FF1020 Comparación

Comparación detallada lado a lado de EP1SGX25FF1020C6N por Intel y EP1SGX25FF1020 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Comparación de especificaciones

Parámetro EP1SGX25FF1020C6N EP1SGX25FF1020
Marca Intel Altera
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Obsolete Obsolete
Estado del stock In Stock In Stock
Precio unitario (USD) $160,00 $295,00
Family Stratix GX Stratix GX
Series Stratix —
Logic Elements 25 660 —
Number of LABs/CLBs 2566 —
Number of User I/O 607 —
Encapsulado 1020-ball FC-FBGA, 33 x 33 mm, 1 mm pitch 1020-ball FCBGA (PBGA, 1.00 mm pitch)
Supply Voltage (Core) 1.5 V —
Process Technology CMOS 130 nm CMOS
Temperatura de funcionamiento 0 °C to 85 °C (commercial) -40C to +85C (industrial variant) / 0C to +85C (commercial variant)
Speed Grade C6 —
Lead-Free (Pb-Free) Yes —
Estado RoHS Compliant (per Altera/Intel product page) [DATA_NEEDED: RoHS compliance status]
Tipo de montaje Surface Mount (BGA) Surface Mount (BGA)
Transceivers Multi-gigabit transceivers (3.125 Gbps class) - exact channel count [DATA_NEEDED] —
Embedded Memory RAM blocks (M512/M4K/M-RAM) - exact total bits [DATA_NEEDED] —
Embedded Multipliers DSP blocks present - exact count [DATA_NEEDED] —
Global Clocks Up to 20 (Stratix GX family) —
Configuration Serial / Parallel (Altera Stratix GX family) —
Logic Elements (LE) — 25,660
Configurable Logic Blocks (CLB) — 2,566
Embedded Memory (bits) — 1,944,576
Logic Cells (per FPGAkey) — 25,660
Combinatorial Delay (Tpd) — 7.49 ns (per Microchip USA datasheet summary)
Operating Frequency (max) — [DATA_NEEDED: max internal operating frequency]
Pin/Package Count — 1020
Tensión de alimentación — [DATA_NEEDED: core VCC voltage]
Serial Transceivers — Embedded SERDES (multi-gigabit, protocol-dependent)
DSP Blocks — Embedded dedicated multipliers
PLL / Clock Management — Embedded PLLs
Configuration Method — SRAM-based, configuration via JTAG / passive serial / fast passive parallel

Hojas de datos y recursos

Examinar todos los productos Crear BOM Solicitar cotización