EP1SGX25FF1020C6N vs EP1SGX25FF1020 Vergleich

Detaillierter Direktvergleich von EP1SGX25FF1020C6N von Intel und EP1SGX25FF1020 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP1SGX25FF1020C6N EP1SGX25FF1020
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $160,00 $295,00
Family Stratix GX Stratix GX
Series Stratix —
Logic Elements 25 660 —
Number of LABs/CLBs 2566 —
Number of User I/O 607 —
Gehäuse 1020-ball FC-FBGA, 33 x 33 mm, 1 mm pitch 1020-ball FCBGA (PBGA, 1.00 mm pitch)
Supply Voltage (Core) 1.5 V —
Process Technology CMOS 130 nm CMOS
Betriebstemperatur 0 °C to 85 °C (commercial) -40C to +85C (industrial variant) / 0C to +85C (commercial variant)
Speed Grade C6 —
Lead-Free (Pb-Free) Yes —
RoHS-Status Compliant (per Altera/Intel product page) [DATA_NEEDED: RoHS compliance status]
Montageart Surface Mount (BGA) Surface Mount (BGA)
Transceivers Multi-gigabit transceivers (3.125 Gbps class) - exact channel count [DATA_NEEDED] —
Embedded Memory RAM blocks (M512/M4K/M-RAM) - exact total bits [DATA_NEEDED] —
Embedded Multipliers DSP blocks present - exact count [DATA_NEEDED] —
Global Clocks Up to 20 (Stratix GX family) —
Configuration Serial / Parallel (Altera Stratix GX family) —
Logic Elements (LE) — 25,660
Configurable Logic Blocks (CLB) — 2,566
Embedded Memory (bits) — 1,944,576
Logic Cells (per FPGAkey) — 25,660
Combinatorial Delay (Tpd) — 7.49 ns (per Microchip USA datasheet summary)
Operating Frequency (max) — [DATA_NEEDED: max internal operating frequency]
Pin/Package Count — 1020
Versorgungsspannung — [DATA_NEEDED: core VCC voltage]
Serial Transceivers — Embedded SERDES (multi-gigabit, protocol-dependent)
DSP Blocks — Embedded dedicated multipliers
PLL / Clock Management — Embedded PLLs
Configuration Method — SRAM-based, configuration via JTAG / passive serial / fast passive parallel

Datenblätter & Ressourcen

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