EP20K200BC356-1 vs EP20K200CB356C7N Comparación
Comparación detallada lado a lado de EP20K200BC356-1 por Altera y EP20K200CB356C7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N ObsoleteComparación de especificaciones
| Parámetro | EP20K200BC356-1 | EP20K200CB356C7N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $335,00 | $92,00 |
| Product Function | APEX-20K Field Programmable Gate Array (FPGA) | — |
| Logic Family | CMOS | — |
| Equivalent System Gates | 200K gates | — |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 bits | — |
| Frecuencia de reloj máxima | 250 MHz | — |
| Core Supply Voltage | 2.5 V | — |
| User I/O Count | 277 | — |
| Número de pines | 356 | — |
| Encapsulado / Carcasa | 356-LBGA | — |
| Package Code | LBGA | — |
| Package Shape | Square | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Process Technology | 0.22 um | 0.15 um CMOS |
| Propagation Delay (tPD) | 2.5 ns (from -1N variant listing) | — |
| Rango de temperatura de funcionamiento | 0 to 85 C (commercial, per -1N variant listing) | — |
| Estado RoHS | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] | unknown |
| Lead-Free Finish | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] | — |
| Family | — | APEX 20KC |
| Series | — | EP20K200 |
| System Gates | — | 200,000 |
| Maximum Operating Frequency | — | 3571.6 MHz (internal equivalent) |
| Propagation Delay | — | 1.48 ns |
| User I/Os | — | 263 |
| Input Terminals | — | 267 |
| Supply Voltage (Nominal) | — | 1.8 V |
| Temperatura de funcionamiento | — | 0C to +85C (Commercial) |
| Encapsulado | — | 356-ball PBGA (S-PBGA) |
| Embedded Memory | — | ESBs (dual-port RAM/ROM/FIFO) |
| Clock Management | — | PLL with up to 4 outputs |
| JTAG Support | — | Yes (IEEE 1149.1) |
| In-System Programmable | — | Yes |