EP20K30EFC324-1 vs EP20K100EFC324-1N Comparación
Comparación detallada lado a lado de EP20K30EFC324-1 por Altera y EP20K100EFC324-1N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K30EFC324-1 | EP20K100EFC324-1N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $99,50 | $108,00 |
| Manufacturer | Altera (now Intel) | — |
| Series | APEX-20K | — |
| Family | APEX-20KE (1.8V, LVDS) | APEX-20KE |
| Logic Elements (typical) | 30,000 (30KLE) | — |
| Typical Gates | [DATA_NEEDED: typical gate count] | 100,000 |
| Total RAM Bits | 24576 | — |
| Maximum User I/O | 128 | 246 |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage | [DATA_NEEDED: VCCIO range] | — |
| Encapsulado | 324-FBGA (FineLine BGA, 19x19 mm) | 324-BGA (FineLine BGA) |
| Tipo de montaje | Surface Mount | — |
| Recuento de pines | 324 | — |
| Temperature Grade | Commercial (per Altera family specification) | — |
| Temperatura de funcionamiento | 0C to +85C (commercial grade per Altera family spec) | 0 C to 85 C |
| Process Technology | SRAM-based, 0.18 um | 0.15 µm all-layer copper CMOS |
| Configuration | Passive serial / passive parallel / JTAG | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Speed Grade | -1 | — |
| Nivel MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| PLLs | Up to 4 (per APEX-20KE family) | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 4160 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |