EP20K400CF672C7ES vs EP20K400CF672C8AA Comparación
Comparación detallada lado a lado de EP20K400CF672C7ES por Altera y EP20K400CF672C8AA por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400CF672C7ES | EP20K400CF672C8AA |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $152,00 | $145,00 |
| Family | APEX 20KC | APEX 20K |
| Series | EP20K400 | — |
| Device Type | Loadable PLD / FPGA | — |
| Logic Elements (Cells) | 16,640 | — |
| System Gates | 400,000 | — |
| Embedded Memory (Bits) | 212,992 | — |
| Total RAM Bits | 212,992 | — |
| Maximum User I/O | 488 | — |
| I/O Lines | 484 | — |
| Input Lines | 488 | — |
| Number of PLLs | 4 | — |
| Maximum Internal Clock Frequency | 375.94 MHz | — |
| Propagation Delay | 1.4 ns | [DATA_NEEDED: typical propagation delay] |
| Process Technology | 0.18 um CMOS | — |
| Core Voltage | 1.8 V | — |
| MultiVolt I/O | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Speed Grade | C7 (commercial, -7) | — |
| Temperatura de funcionamiento | 0C to +85C (commercial) | 0 C to 85 C (Commercial) |
| Package Type | 672-ball FineLine BGA | 672-ball Fine-Pitch BGA (FBGA) |
| Package Code | FC-FBGA-B672 | — |
| Ball Pitch | 1.000 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Number of Logic Elements/Cells | — | 16640 |
| Number of Logic Units (LEs) | — | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | — | 212 |
| On-chip RAM Bits | — | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | — | 488 |
| Number of Pins/Balls | — | 672 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Packaging | — | Tray |
| Nivel de sensibilidad a la humedad (MSL) | — | 3 (168 Hours) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |