EP20K400CF672C7ES vs EP20K400CF672C8AA Comparison
Detailed side-by-side comparison of EP20K400CF672C7ES by Altera and EP20K400CF672C8AA by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400CF672C7ES | EP20K400CF672C8AA |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $152.00 | $145.00 |
| Family | APEX 20KC | APEX 20K |
| Series | EP20K400 | β |
| Device Type | Loadable PLD / FPGA | β |
| Logic Elements (Cells) | 16,640 | β |
| System Gates | 400,000 | β |
| Embedded Memory (Bits) | 212,992 | β |
| Total RAM Bits | 212,992 | β |
| Maximum User I/O | 488 | β |
| I/O Lines | 484 | β |
| Input Lines | 488 | β |
| Number of PLLs | 4 | β |
| Maximum Internal Clock Frequency | 375.94 MHz | β |
| Propagation Delay | 1.4 ns | [DATA_NEEDED: typical propagation delay] |
| Process Technology | 0.18 um CMOS | β |
| Core Voltage | 1.8 V | β |
| MultiVolt I/O | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Speed Grade | C7 (commercial, -7) | β |
| Operating Temperature | 0C to +85C (commercial) | 0 C to 85 C (Commercial) |
| Package Type | 672-ball FineLine BGA | 672-ball Fine-Pitch BGA (FBGA) |
| Package Code | FC-FBGA-B672 | β |
| Ball Pitch | 1.000 mm | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Number of Logic Elements/Cells | β | 16640 |
| Number of Logic Units (LEs) | β | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | β | 212 |
| On-chip RAM Bits | β | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | β | 488 |
| Number of Pins/Balls | β | 672 |
| Supply Voltage (Core) | β | 2.5 V |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Packaging | β | Tray |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Configuration Interface | β | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |