EP20K400CF672C7ES vs EP20K400CF672C8AA Comparaison
Comparaison détaillée côte à côte de EP20K400CF672C7ES par Altera et EP20K400CF672C8AA par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CF672C7ES | EP20K400CF672C8AA |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $145,00 |
| Family | APEX 20KC | APEX 20K |
| Series | EP20K400 | — |
| Device Type | Loadable PLD / FPGA | — |
| Logic Elements (Cells) | 16,640 | — |
| System Gates | 400,000 | — |
| Embedded Memory (Bits) | 212,992 | — |
| Total RAM Bits | 212,992 | — |
| Maximum User I/O | 488 | — |
| I/O Lines | 484 | — |
| Input Lines | 488 | — |
| Number of PLLs | 4 | — |
| Maximum Internal Clock Frequency | 375.94 MHz | — |
| Propagation Delay | 1.4 ns | [DATA_NEEDED: typical propagation delay] |
| Process Technology | 0.18 um CMOS | — |
| Core Voltage | 1.8 V | — |
| MultiVolt I/O | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Speed Grade | C7 (commercial, -7) | — |
| Température de fonctionnement | 0C to +85C (commercial) | 0 C to 85 C (Commercial) |
| Package Type | 672-ball FineLine BGA | 672-ball Fine-Pitch BGA (FBGA) |
| Package Code | FC-FBGA-B672 | — |
| Ball Pitch | 1.000 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Number of Logic Elements/Cells | — | 16640 |
| Number of Logic Units (LEs) | — | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | — | 212 |
| On-chip RAM Bits | — | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | — | 488 |
| Number of Pins/Balls | — | 672 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Packaging | — | Tray |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 (168 Hours) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |