EP20K600CF672-3 vs EP20K600CB672C7 Comparación
Comparación detallada lado a lado de EP20K600CF672-3 por Intel y EP20K600CB672C7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K600CF672-3 | EP20K600CB672C7 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $99,50 | $182,50 |
| Family | APEX 20KC | APEX 20KC |
| Typical Gates | 600,000 | 600,000 |
| Maximum System Gates | 2,432,000 | 1,053,840 |
| Maximum Logic Elements | 2,432 | — |
| Embedded System Memory | 311,040 bits (380 Kbits ESB) | — |
| User I/O Pins | 488 | — |
| Encapsulado | 672-ball FineLine BGA | 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) |
| Speed Grade | -3 | C7 (commercial, 0 °C to 85 °C) |
| Process Technology | 0.18 µm CMOS | 0.15 µm all-layer copper-metal CMOS |
| PLLs | 4 | — |
| Maximum Internal Frequency | 180 MHz (per APEX 20K family datasheet) | — |
| Configuration Modes | PS, PPS, PPA, JTAG, EPC2/EPC16 | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL-2/3, HSTL, LVDS, PCI | — |
| Tipo de montaje | Surface Mount | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0 °C to 85 °C (commercial) |
| Estado RoHS | Lead-free / RoHS compliant (per Alibaba listing) | Compliant |
| Device Type | — | FPGA / Programmable Logic Device (PLD) |
| Logic Elements | — | 30,960 (typical) |
| Embedded Memory | — | 311 kbits (EAB-based) |
| User I/Os | — | 488 |
| Propagation Delay | — | 1.48 ns |
| Core Voltage | — | 2.5 V |
| I/O Voltage Support | — | 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) |
| Number of PLLs | — | 4 |
| Dual-Port RAM | — | Yes (4.5 ns access) |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT |
| Configuration Method | — | EPC configuration devices / JTAG / passive serial |