EP20K600CF672-3 vs EP20K600CB672C7 Comparaison
Comparaison détaillée côte à côte de EP20K600CF672-3 par Intel et EP20K600CB672C7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CF672-3 | EP20K600CB672C7 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $99,50 | $182,50 |
| Family | APEX 20KC | APEX 20KC |
| Typical Gates | 600,000 | 600,000 |
| Maximum System Gates | 2,432,000 | 1,053,840 |
| Maximum Logic Elements | 2,432 | — |
| Embedded System Memory | 311,040 bits (380 Kbits ESB) | — |
| User I/O Pins | 488 | — |
| Boîtier | 672-ball FineLine BGA | 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) |
| Speed Grade | -3 | C7 (commercial, 0 °C to 85 °C) |
| Process Technology | 0.18 µm CMOS | 0.15 µm all-layer copper-metal CMOS |
| PLLs | 4 | — |
| Maximum Internal Frequency | 180 MHz (per APEX 20K family datasheet) | — |
| Configuration Modes | PS, PPS, PPA, JTAG, EPC2/EPC16 | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL-2/3, HSTL, LVDS, PCI | — |
| Type de montage | Surface Mount | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 °C to 85 °C (commercial) |
| Statut RoHS | Lead-free / RoHS compliant (per Alibaba listing) | Compliant |
| Device Type | — | FPGA / Programmable Logic Device (PLD) |
| Logic Elements | — | 30,960 (typical) |
| Embedded Memory | — | 311 kbits (EAB-based) |
| User I/Os | — | 488 |
| Propagation Delay | — | 1.48 ns |
| Core Voltage | — | 2.5 V |
| I/O Voltage Support | — | 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) |
| Number of PLLs | — | 4 |
| Dual-Port RAM | — | Yes (4.5 ns access) |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT |
| Configuration Method | — | EPC configuration devices / JTAG / passive serial |