EP2C8F256C8N vs EP2C5F256C8N Comparación
Comparación detallada lado a lado de EP2C8F256C8N por Altera y EP2C5F256C8N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP2C5F256C8N - Cyclone II FPGA, 4.6K LEs, 158 I/O | Altera / Intel
EP2C5F256C8N ⚠ Última compraComparación de especificaciones
| Parámetro | EP2C8F256C8N | EP2C5F256C8N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $11,84 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Cyclone II | — |
| Logic Elements | 8256 | — |
| Embedded Memory | 165888 bit | — |
| Programmable I/O Count | 182 | — |
| Encapsulado | 256-LBGA | 256-ball FineLine BGA (FBGA-256) |
| Package Pin Count | 256 pin | — |
| Tensión de alimentación | 3.3 V | — |
| Maximum Frequency | 156 MHz | — |
| Estado RoHS | unknown | Compliant (lead-free) |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Core Voltage Range | [DATA_NEEDED: core voltage range] | — |
| Family | — | Cyclone II |
| Logic Elements (LE) | — | 4,608 |
| Logic Array Blocks (LAB) | — | 288 |
| Embedded Memory (M4K blocks) | — | 119,808 bits (~14.6 Kbytes) |
| Embedded 18x18 Multipliers | — | 13 |
| PLLs | — | 2 |
| Maximum User I/O Pins | — | 158 |
| Process Technology | — | 90 nm low-k CMOS |
| Core Voltage | — | 1.2 V |
| Speed Grade | — | 8 (commercial) |
| Temperatura de funcionamiento | — | 0C to +85C (commercial) |
| Tipo de montaje | — | Surface Mount |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), Passive Serial |
| Nivel MSL | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |