EP2S30F672C4 vs EP2S30F672C5 Comparación
Comparación detallada lado a lado de EP2S30F672C4 por Intel y EP2S30F672C5 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S30F672C4 | EP2S30F672C5 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $498,43 | $155,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix II | — |
| Logic Elements / Cells | 33,880 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Number of I/O | 500 | — |
| Encapsulado | 672-BBGA, FCBGA (27x27 mm) | 672-pin FC-FBGA (flip-chip) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Core Voltage - Supply | 1.15 V to 1.25 V | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Maximum Core Frequency (datasheet benchmark) | 711 MHz | — |
| Temperatura de funcionamiento | 0C to +85C (commercial, 'C' speed grade) | — |
| Embedded DSP Blocks | 16 (Stratix II S30 tier) | — |
| Number of PLLs | [DATA_NEEDED: PLL count for S30 tier] | — |
| Number of Global Clock Networks | [DATA_NEEDED: global clock network count] | — |
| Estado RoHS | Compliant | [DATA_NEEDED: confirmed RoHS compliance] |
| Lead-Free | Yes | — |
| Family | — | Stratix II |
| Logic Elements | — | 33,880 |
| Logic Array Blocks (LABs) | — | 1,694 |
| Embedded Multipliers (DSP blocks) | — | 12 DSP blocks |
| Maximum User I/Os | — | 500 |
| Core Voltage | — | 1.2 V |
| Maximum Operating Frequency | — | 609.76 MHz |
| Speed Grade | — | C5 (moderate-speed bin) |
| Operating Temperature (Commercial) | — | 0C to 85C junction |
| Tipo de memoria | — | TriMatrix (M512 / M4K / M-RAM) |