EP2S30F672C4 vs EP2S30F672C5 比較
詳細な並列比較: EP2S30F672C4 メーカー: Intel および EP2S30F672C5 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S30F672C4 | EP2S30F672C5 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $498.43 | $155.00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix II | — |
| Logic Elements / Cells | 33,880 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Number of I/O | 500 | — |
| パッケージ | 672-BBGA, FCBGA (27x27 mm) | 672-pin FC-FBGA (flip-chip) |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Core Voltage - Supply | 1.15 V to 1.25 V | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Maximum Core Frequency (datasheet benchmark) | 711 MHz | — |
| 動作温度 | 0C to +85C (commercial, 'C' speed grade) | — |
| Embedded DSP Blocks | 16 (Stratix II S30 tier) | — |
| Number of PLLs | [DATA_NEEDED: PLL count for S30 tier] | — |
| Number of Global Clock Networks | [DATA_NEEDED: global clock network count] | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: confirmed RoHS compliance] |
| Lead-Free | Yes | — |
| Family | — | Stratix II |
| Logic Elements | — | 33,880 |
| Logic Array Blocks (LABs) | — | 1,694 |
| Embedded Multipliers (DSP blocks) | — | 12 DSP blocks |
| Maximum User I/Os | — | 500 |
| Core Voltage | — | 1.2 V |
| Maximum Operating Frequency | — | 609.76 MHz |
| Speed Grade | — | C5 (moderate-speed bin) |
| Operating Temperature (Commercial) | — | 0C to 85C junction |
| メモリタイプ | — | TriMatrix (M512 / M4K / M-RAM) |