EP2S60F67214N vs EP2S60F672C3N Comparación
Comparación detallada lado a lado de EP2S60F67214N por Altera y EP2S60F672C3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2S60F67214N | EP2S60F672C3N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $232,00 | $1.175,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 LE | — |
| Total RAM Bits | 2,544,192 bit (2.5 Mbit) | — |
| DSP Blocks | 12 | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Encapsulado | 672-ball FBGA (FineLine BGA) | 672-pin FC-FBGA |
| Tipo de montaje | Surface Mount | Surface Mount |
| Speed Grade | I4 (industrial, fast) | C3 (slower speed grade) |
| Temperatura de funcionamiento | -40C to +100C (industrial) | 0C to +85C (commercial grade) |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V (typical) | — |
| I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count for FBGA-672] | — |
| Configuration | SRAM-based, configured via bitstream | — |
| Estado RoHS | Lead-free / RoHS compliant | unknown |
| Nivel MSL | 3 (168 hours floor life) | — |
| Logic Elements (LE) | — | 60,440 |
| Logic Array Blocks (LABs) | — | 3,022 |
| Adaptive Logic Modules (ALMs) | — | 24,176 |
| Total Embedded Memory | — | 2,544,192 bits (2.5 Mbits) |
| User I/O Pins | — | 492 |
| User I/O Banks | — | 8 |
| Core Supply Voltage (VCCINT) | — | 1.2 V |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Pre-Driver Supply (VCCPD) | — | 3.3 V |
| Maximum Internal Clock Frequency | — | 816.99 MHz |
| PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Lead-Free | — | unknown |