EP610DC-25 vs EP610DI-30N Comparación
Comparación detallada lado a lado de EP610DC-25 por Rochester Electronics y EP610DI-30N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ ActivoComparación de especificaciones
| Parámetro | EP610DC-25 | EP610DI-30N |
|---|---|---|
| Marca | Rochester Electronics | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $17,80 |
| Family | Altera Classic EPLD | Altera Classic EP610 |
| Product Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| Encapsulado | 24-pin CDIP (Ceramic DIP, through-hole) | CDIP-24 (Ceramic DIP, windowed) |
| Tipo de montaje | Through Hole | Through-hole (DIP) |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V ±5% |
| Temperatura de funcionamiento | 0 C to +70 C | -40°C to +85°C (industrial) |
| Technology | CMOS EPROM (UV-erasable) | — |
| Programming Method | JEDEC fuse-map / UV-erase | UV-erasable (windowed ceramic) |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Usable Gates | — | 300 |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Frequency | — | 33.3 MHz (system); 100 MHz (pipelined) |
| Recuento de pines | — | 24 |
| Process Technology | — | CMOS |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |