EP610DC-25 vs EP610DI-30N 对比
详细并排对比 EP610DC-25 出自 Rochester Electronics 和 EP610DI-30N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ 量产中规格对比
| 参数 | EP610DC-25 | EP610DI-30N |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $17.80 |
| Family | Altera Classic EPLD | Altera Classic EP610 |
| Product Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| 封装 | 24-pin CDIP (Ceramic DIP, through-hole) | CDIP-24 (Ceramic DIP, windowed) |
| 安装类型 | Through Hole | Through-hole (DIP) |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V ±5% |
| 工作温度 | 0 C to +70 C | -40°C to +85°C (industrial) |
| Technology | CMOS EPROM (UV-erasable) | — |
| Programming Method | JEDEC fuse-map / UV-erase | UV-erasable (windowed ceramic) |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Usable Gates | — | 300 |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Frequency | — | 33.3 MHz (system); 100 MHz (pipelined) |
| 引脚数量 | — | 24 |
| Process Technology | — | CMOS |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |