EP910LC-35 vs EP910LC-30 Comparación
Comparación detallada lado a lado de EP910LC-35 por Altera y EP910LC-30 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP910LC-35 | EP910LC-30 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $18,75 | $22,50 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic (EP910) | — |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 30 ns (max) |
| Maximum Toggle Frequency | 28.6 MHz | 62 MHz |
| Supply Voltage (VCC) | 5 V | 5 V (nominal, TTL) |
| Technology | CMOS EPROM | — |
| Encapsulado | PLCC-44 (J-lead, LC suffix) | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | — |
| Recuento de pines | 44 | — |
| Programmable Flip-Flops | Yes (per macrocell) | — |
| Output Enable Control | Per macrocell | — |
| Erasure Method | UV (windowed) or OTP (plastic) | — |
| Estado RoHS | Not applicable (legacy product) | [DATA_NEEDED: RoHS status] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Process Technology | — | CMOS (EPROM-based) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |