EP910LC-35 vs EP910LC-30 比較
詳細な並列比較: EP910LC-35 メーカー: Altera および EP910LC-30 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LC-35 | EP910LC-30 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $18.75 | $22.50 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic (EP910) | — |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 30 ns (max) |
| Maximum Toggle Frequency | 28.6 MHz | 62 MHz |
| Supply Voltage (VCC) | 5 V | 5 V (nominal, TTL) |
| Technology | CMOS EPROM | — |
| パッケージ | PLCC-44 (J-lead, LC suffix) | — |
| 動作温度 | 0C to +70C (commercial) | — |
| ピン数 | 44 | — |
| Programmable Flip-Flops | Yes (per macrocell) | — |
| Output Enable Control | Per macrocell | — |
| Erasure Method | UV (windowed) or OTP (plastic) | — |
| RoHS ステータス | Not applicable (legacy product) | [DATA_NEEDED: RoHS status] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Process Technology | — | CMOS (EPROM-based) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |
| MSLレベル | — | [DATA_NEEDED: MSL level] |