EPC1441TC32 vs EPC144TC32N Comparación
Comparación detallada lado a lado de EPC1441TC32 por Altera y EPC144TC32N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPC144TC32N - Enhanced Configuration Device, 32-pin TQFP | Intel (Altera)
EPC144TC32N ObsoleteComparación de especificaciones
| Parámetro | EPC1441TC32 | EPC144TC32N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $3,85 |
| Tipo de memoria | OTP Configuration PROM (flash-based) | — |
| Tamaño de memoria | 440 Kbit (55000 byte) | — |
| Programmability | One-Time Programmable (OTP) | — |
| Tensión de alimentación | 3.3 V / 5.0 V | — |
| Internal Oscillator | 16.7 MHz | — |
| In-System Programming | IEEE 1149.1 JTAG, 3.3 V / 5.0 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous | — |
| Daisy Chain Support | Yes | — |
| Encapsulado | 32-TQFP (7 mm x 7 mm) | TQFP-32 |
| Temperatura de funcionamiento | Commercial (0C to +70C) | -40C to +85C (industrial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| Terminal Pitch | 0.8 mm | — |
| Nivel MSL | 3 (168 hours) | [DATA_NEEDED: MSL level] |
| Estado RoHS | [DATA_NEEDED: RoHS status - datasheet not yet verified] | — |
| Device Type | — | Enhanced Configuration (EPC) Device, serial EEPROM |
| Configuration Memory Size | — | 440800 bits (approximately 54 KB) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Configuration Interface | — | Altera serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Programming Interface | — | IEEE Std 1149.1 JTAG (TMS, TCK, TDI, TDO) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Supply Voltage VPP | — | Generated internally (no external VPP required) |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| JTAG Chain Compatibility | — | Yes (shares TDI/TDO with target FPGA) |
| Programming Cycles | — | [DATA_NEEDED: endurance] |