EPC1441TC32 vs EPC144TC32N Comparaison
Comparaison détaillée côte à côte de EPC1441TC32 par Altera et EPC144TC32N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPC144TC32N - Enhanced Configuration Device, 32-pin TQFP | Intel (Altera)
EPC144TC32N ObsoleteComparaison des spécifications
| Paramètre | EPC1441TC32 | EPC144TC32N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $3,85 |
| Type de mémoire | OTP Configuration PROM (flash-based) | — |
| Taille de mémoire | 440 Kbit (55000 byte) | — |
| Programmability | One-Time Programmable (OTP) | — |
| Tension d'alimentation | 3.3 V / 5.0 V | — |
| Internal Oscillator | 16.7 MHz | — |
| In-System Programming | IEEE 1149.1 JTAG, 3.3 V / 5.0 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous | — |
| Daisy Chain Support | Yes | — |
| Boîtier | 32-TQFP (7 mm x 7 mm) | TQFP-32 |
| Température de fonctionnement | Commercial (0C to +70C) | -40C to +85C (industrial) |
| Type de montage | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| Terminal Pitch | 0.8 mm | — |
| Niveau MSL | 3 (168 hours) | [DATA_NEEDED: MSL level] |
| Statut RoHS | [DATA_NEEDED: RoHS status - datasheet not yet verified] | — |
| Device Type | — | Enhanced Configuration (EPC) Device, serial EEPROM |
| Configuration Memory Size | — | 440800 bits (approximately 54 KB) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Configuration Interface | — | Altera serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Programming Interface | — | IEEE Std 1149.1 JTAG (TMS, TCK, TDI, TDO) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Supply Voltage VPP | — | Generated internally (no external VPP required) |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| JTAG Chain Compatibility | — | Yes (shares TDI/TDO with target FPGA) |
| Programming Cycles | — | [DATA_NEEDED: endurance] |