EPC16QC100SS vs EPC16QC100DM Comparación
Comparación detallada lado a lado de EPC16QC100SS por Intel y EPC16QC100DM por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC16QC100SS | EPC16QC100DM |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $13,20 | $15,85 |
| Tipo de memoria | In-System Programmable Configuration PROM | Non-volatile Configuration PROM (NOR flash) |
| Tamaño de memoria | 16 Mb (16,777,216 bits) | — |
| Configuration Interface | Passive Serial / Passive Parallel Synchronous / Passive Parallel Asynchronous | Serial (SPI-compatible, Altera FPP mode) |
| Operating Modes | FPGA configuration storage, ISP via IEEE 1532 | — |
| Supply Voltage (VCC) | 3.3 V (SS suffix variant) | — |
| I/O Logic Level | 3.3V or 2.5V selectable via VCCSEL | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | — |
| Encapsulado | 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm | 100-pin PQFP (QFPA) |
| Tipo de montaje | Surface Mount | — |
| Compatible FPGAs | Stratix, Stratix II, Cyclone, Cyclone II, APEX 20K, other Altera FPGAs requiring >8 Mbit configuration | — |
| Programmability | In-system programmable (IEEE 1532) | — |
| Nivel MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Estado RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | Intel (formerly Altera) | — |
| Memory Density | — | 16 Mbit (2 Mbyte) |
| Core Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| I/O Voltage (VIO) | — | 2.5 V / 3.3 V selectable |
| Output Voltage (VPP) | — | 1.8 V / 2.5 V / 3.3 V selectable |
| Maximum DCLK Frequency | — | 40 MHz |
| Cascadable | — | Yes (multi-device daisy chain via nCASC) |
| In-System Programming | — | Yes (IEEE 1532 / JTAG) |
| Program/Erase Cycles | — | [DATA_NEEDED: program/erase cycle endurance] |
| Data Retention | — | [DATA_NEEDED: data retention years] |
| Rango de temperatura de funcionamiento | — | -40 C to +85 C (industrial) |
| Package Code | — | Q100 + DM suffix |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Compatible FPGA Families | — | Stratix, Cyclone, APEX, ACEX |