EPC22LC20 vs EPC2LC20 Comparación
Comparación detallada lado a lado de EPC22LC20 por Intel y EPC2LC20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC22LC20 | EPC2LC20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | Memory ICs |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,10 | $7,20 |
| Función | In-System Programmable Configuration PROM for SRAM-based FPGAs | — |
| Tamaño de memoria | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (IEEE 1532 / Jam STAPL) | — |
| Supply Voltage - Low Range | 3.0 V to 3.6 V | — |
| Supply Voltage - High Range | 4.75 V to 5.25 V | — |
| Supported FPGA Families | ACEX 1K, APEX II, APEX 20K, FLEX 10K | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Configuration Interface | Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE) | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Encapsulado / Carcasa | 20-LCC (J-Lead, 9 x 9 mm) | — |
| Tipo de montaje | Surface Mount (PLCC socket compatible) | Surface Mount |
| Packaging | Tube | — |
| Temperatura de funcionamiento | 0 C to +70 C (commercial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Minimum DC Input Voltage | -0.3 V | — |
| Input Overshoot Tolerance | 7.0 V for <100 mA, <20 ns no-load | — |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns no-load | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status not in verified data] | — |
| Tipo de memoria | — | Non-volatile configuration PROM |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Encapsulado | — | 20-pin PLCC (J-lead, 9x9 mm) |
| Estado RoHS | — | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |