EPC2LC22N vs EPC2LI20N Comparación
Comparación detallada lado a lado de EPC2LC22N por Altera y EPC2LI20N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC22N | EPC2LI20N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $5,10 |
| Tipo de memoria | Configuration PROM (non-volatile) | Non-volatile configuration PROM (Flash) |
| Tamaño de memoria | 1.6 Mbit | 1.6 Mbit |
| Tensión de alimentación | 2.5 V (LC core) | — |
| Interfaz | Serial configuration / JTAG (IEEE 1149.1) | — |
| Programmability | In-system programmable (ISP) via JTAG | — |
| Cascadable | Yes - supports multi-device configuration chains | — |
| Encapsulado | PLCC-22 (Plastic Leaded Chip Carrier) | — |
| Tipo de montaje | Surface Mount / Through Hole socket | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Configuration Compatibility | Altera APEX, ACEX, Mercury, Cyclone, Stratix series FPGAs | — |
| JTAG Pins | TCK, TMS, TDI, TDO | — |
| Internal Oscillator | Yes (built-in configuration timing) | — |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Status | Legacy / Obsolete (replaced by flash-based FPGA configuration) | — |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Encapsulado / Carcasa | — | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | — | Tube |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |