EPF10K250EFC672-2 vs EPF10K250EFC672-1 Comparación
Comparación detallada lado a lado de EPF10K250EFC672-2 por Intel y EPF10K250EFC672-1 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPF10K250EFC672-2 | EPF10K250EFC672-1 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $108,00 | $115,00 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 12,480 | — |
| Typical Gates | 250,000 | — |
| Embedded Array Blocks (EABs) | 20 | — |
| Maximum User RAM Bits | 40,960 | — |
| User I/Os | 470 | — |
| Encapsulado | 672-BGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch | — |
| Recuento de pines | 672 | — |
| Propagation Delay | 0.4 ns | 0.4 ns |
| Temperatura de funcionamiento | 0 C to +70 C (Commercial) | 0C to +70C (Commercial) |
| Core Supply Voltage | 2.3 V (typical 2.5 V) | — |
| I/O Standard Support | 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) | — |
| Logic Family | CMOS, SRAM-based | CMOS |
| Configuration | SRAM, in-system programmable (ISP) via JTAG | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Non-RoHS Compliant (per Fly-Wing listing) | [DATA_NEEDED: RoHS status] |
| Typical System Gates | — | 250,000 |
| Maximum User I/Os | — | 470 |
| Total Pins | — | 672 |
| Package Type | — | BGA-672 |
| Package Size | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Package Shape | — | Square |
| Terminal Form | — | Ball |
| Programming Technology | — | In-system, SRAM-based |
| Configuration Interface | — | Serial (passive/active) |
| Speed Grade | — | -1 |