EPM1270F256I5 vs EPM1270F256 Comparación
Comparación detallada lado a lado de EPM1270F256I5 por Altera y EPM1270F256 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM1270F256I5 | EPM1270F256 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,90 | $10,85 |
| Device Family | MAX II | — |
| Series | EPM1270 | — |
| Macrocell Count | 980 | — |
| Logic Elements | 1270 | 1270 |
| User I/O Pins | 212 (max) | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Encapsulado | 256-ball FBGA (FineLine BGA) | 256-Pin FineLine BGA |
| Pin/Package Count | 256 | — |
| Process Technology | 0.18 µm | 0.18 µm |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Pin-to-Pin Delay (tPD) | 6.2 ns | — |
| Temperatura de funcionamiento | -40 °C to +100 °C (industrial, "I") | -40C to +100C (industrial, I5N suffix) |
| Speed Grade | 5 | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Family | — | MAX II |
| Macro Cells (Typical) | — | 980 |
| User I/O (Max) | — | 212 |
| Supply Voltage (Core) | — | 2.5 V / 3.3 V (on-chip regulator) |
| I/O Voltages Supported | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Maximum Frequency | — | 201.1 MHz |
| Configuration Memory | — | Non-volatile flash (instant-on) |
| Vertical Migration | — | Pin-compatible with EPM570F256 and EPM2210F256 |