EPM3128ATC100-7N vs EPM3128ATC100-10N Comparación
Comparación detallada lado a lado de EPM3128ATC100-7N por Intel y EPM3128ATC100-10N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM3128ATC100-7N - MAX 3000A 128-Macrocell CPLD, 7.5 ns, TQFP-100 | Intel (Altera)
EPM3128ATC100-7N NrndAltera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N NrndComparación de especificaciones
| Parámetro | EPM3128ATC100-7N | EPM3128ATC100-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3,52 | $5,20 |
| Family | MAX 3000A | MAX 3000A |
| Macro Cells | 128 | 128 |
| Usable Gates | Up to 10,000 | 2500 |
| Number of I/Os | 80 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Counter Frequency (max) | 227.3 MHz | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Interface Levels | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) | — |
| In-System Programmability | Yes (IEEE 1532 / JTAG) | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | 0 °C to +70 °C (commercial) |
| Encapsulado | TQFP-100 (100-pin TQFP, fine-line BGA-256 noted in third-party listings) | 100-pin TQFP (14 x 14 x 1.0 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| Speed Grade | -7 | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Number of I/O | — | 80 |
| Logic Elements / Blocks | — | 8 LABs (16 macrocells each) |
| Maximum Internal Frequency (fMAX) | — | 98 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Bank Voltage VCCIO | — | 3.3 V or 2.5 V (selectable) |
| Configuration Memory | — | CMOS EEPROM (non-volatile, instant-on) |
| In-System Programming | — | IEEE Std. 1532-compliant ISP via JTAG |
| Lead-Free | — | Yes |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |