EPM5128LC2 vs EPM5128JC Comparación
Comparación detallada lado a lado de EPM5128LC2 por Altera y EPM5128JC por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5128LC2 | EPM5128JC |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,40 | $9,75 |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD / CPLD |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | 35 ns |
| Supply Voltage (VCC) | 5 V | 5 V (typical) |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Configuration Memory | On-chip EPROM (non-volatile) | UV-erasable EPROM (windowed package) |
| Boundary Scan | JTAG / IEEE 1149.1 | JTAG IEEE 1149.1 (family feature) |
| Temperatura de funcionamiento | -40 C to +85 C (extended commercial) | Commercial 0C to +70C |
| Encapsulado | PGA (Pin Grid Array, ceramic) | — |
| Tipo de montaje | Through-Hole / Socketed | Surface Mount (PLCC socket or solder) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - legacy part] |
| Product Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Logic Elements | — | Programmable AND/OR/XOR array |
| Número de pines | — | 68 |
| Package Type | — | PLCC-68 (JLCC) ceramic, J-leaded |
| Dedicated Inputs | — | 8 |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Programming Interface | — | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |