EPM5128LC2 vs EPM5128JC 对比

详细并排对比 EPM5128LC2 出自 Altera 和 EPM5128JC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ 最后一次采购

规格对比

参数 EPM5128LC2 EPM5128JC
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $22.40 $9.75
Family MAX 5000 —
Device Type CPLD (Complex Programmable Logic Device) EPLD / CPLD
Macrocells 128 —
Logic Array Blocks (LABs) 8 —
Interconnect Programmable Interconnect Array (PIA) —
Global Clock Inputs 1 dedicated —
Propagation Delay (tPD) 45 ns 35 ns
Supply Voltage (VCC) 5 V 5 V (typical)
Process Technology CMOS EPROM CMOS EPROM
Configuration Memory On-chip EPROM (non-volatile) UV-erasable EPROM (windowed package)
Boundary Scan JTAG / IEEE 1149.1 JTAG IEEE 1149.1 (family feature)
工作温度 -40 C to +85 C (extended commercial) Commercial 0C to +70C
封装 PGA (Pin Grid Array, ceramic) —
安装类型 Through-Hole / Socketed Surface Mount (PLCC socket or solder)
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status - legacy part]
Product Family — MAX 5000
Macrocell Count — 128
Logic Elements — Programmable AND/OR/XOR array
引脚数 — 68
Package Type — PLCC-68 (JLCC) ceramic, J-leaded
Dedicated Inputs — 8
User I/O Pins — [DATA_NEEDED: user I/O pin count]
Programming Interface — Altera MAX+PLUS II / A+PLUS / legacy programmer
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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