EPM5192AGC-15 vs EPM5192AJC84-15 Comparación
Comparación detallada lado a lado de EPM5192AGC-15 por Altera y EPM5192AJC84-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 ObsoleteComparación de especificaciones
| Parámetro | EPM5192AGC-15 | EPM5192AJC84-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $27,80 | $18,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Technology | CMOS, UV-erasable EPROM | CMOS, UV-erasable EPROM |
| Encapsulado | Ceramic Pin Grid Array (PGA) | 84-pin PLCC (J84C) windowed ceramic |
| Programming Method | UV erase + EPROM program (via Altera programmer) | UV-erase + EPROM programming (windowed package) |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial/military grade] |
| Estado RoHS | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | Non-compliant (contains Pb, ceramic windowed package) |
| Estado del ciclo de vida | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| Tipo de montaje | — | Surface Mount |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Process Technology | — | CMOS EPROM |