EPM5192AGC-15 vs EPM5192AJC84-15 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC-15 par Altera et EPM5192AJC84-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 ObsoleteComparaison des spécifications
| Paramètre | EPM5192AGC-15 | EPM5192AJC84-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,80 | $18,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Technology | CMOS, UV-erasable EPROM | CMOS, UV-erasable EPROM |
| Boîtier | Ceramic Pin Grid Array (PGA) | 84-pin PLCC (J84C) windowed ceramic |
| Programming Method | UV erase + EPROM program (via Altera programmer) | UV-erase + EPROM programming (windowed package) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial/military grade] |
| Statut RoHS | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | Non-compliant (contains Pb, ceramic windowed package) |
| Statut du cycle de vie | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| Type de montage | — | Surface Mount |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Process Technology | — | CMOS EPROM |