EPM5192AJM84-20 vs EPM5192AGC84-20 Comparación
Comparación detallada lado a lado de EPM5192AJM84-20 por Altera y EPM5192AGC84-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192AJM84-20 | EPM5192AGC84-20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $171,00 | $41,20 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 5000 (EPM5192) | — |
| Device Type | CMOS UV-Erasable/OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| Frecuencia de reloj máxima | 66.7 MHz | — |
| Propagation Delay (tPD) | 33 ns (speed grade -20) | — |
| Encapsulado | 84-pin CQFP (S-CQCC-J84, J-lead) | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Terminal Form | J-Bend | — |
| Temperature Grade | MILITARY | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance] |
| Erasure Method | UV (quartz-windowed CQFP) or OTP | UV-Erasable (with OTP window) |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Family | — | MAX 5000 |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Package Code | — | WPGA |
| Operating Temperature Grade | — | Commercial |
| Tensión de alimentación | — | [DATA_NEEDED: VCC range] |
| I/O Standard | — | 5V CMOS / TTL compatible |
| Tipo de montaje | — | Through-Hole (Pin Grid Array socket) |