EPM5192AJM84-20 vs EPM5192AGC84-20 비교
다음의 상세 나란히 비교: EPM5192AJM84-20 제조: Altera 및 EPM5192AGC84-20 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192AJM84-20 | EPM5192AGC84-20 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $171.00 | $41.20 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 5000 (EPM5192) | — |
| Device Type | CMOS UV-Erasable/OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| 최대 클록 주파수 | 66.7 MHz | — |
| Propagation Delay (tPD) | 33 ns (speed grade -20) | — |
| 패키지 | 84-pin CQFP (S-CQCC-J84, J-lead) | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Terminal Form | J-Bend | — |
| Temperature Grade | MILITARY | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS |
| RoHS 상태 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance] |
| Erasure Method | UV (quartz-windowed CQFP) or OTP | UV-Erasable (with OTP window) |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| Family | — | MAX 5000 |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Package Code | — | WPGA |
| Operating Temperature Grade | — | Commercial |
| 공급 전압 | — | [DATA_NEEDED: VCC range] |
| I/O Standard | — | 5V CMOS / TTL compatible |
| 실장 유형 | — | Through-Hole (Pin Grid Array socket) |