EPM5192ALC84-15 vs EPM5192ALC84-20 Comparación
Comparación detallada lado a lado de EPM5192ALC84-15 por Altera y EPM5192ALC84-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192ALC84-15 | EPM5192ALC84-20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $13,20 | $19,40 |
| Device Family | MAX 5000 (EPM5192) | — |
| Device Type | CPLD / UV-Erasable / OTP Complex PLD | UV-Erasable/OTP Complex PLD (EPLD) |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Propagation Delay (Industry Variant) | 25 ns (per MicrochipUSA listing) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Process Technology | CMOS (EPROM-based) | CMOS |
| Programmability | UV-erasable window / OTP | — |
| Encapsulado | 84-pin PLCC (QCCJ, J-bend ceramic) | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Operating Temperature Grade | Commercial | — |
| Terminal Form | J-BEND | J-bend |
| Package Code | QCCJ | QCCJ (PLCC-84) |
| Package Shape | SQUARE | Square |
| Architecture | Programmable Logic Array + Macrocell Registers + PIA interconnect | — |
| Series | — | Altera MAX 5000 |
| Speed Grade | — | -20 (20 ns pin-to-pin delay) |
| Terminal Pitch | — | 1.270 mm |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV-erase + EPROM (One-Time-Programmable option) |
| Logic Family | — | MAX 5000 EPLD |
| I/O Compatibility | — | TTL-compatible |
| Tipo de montaje | — | Surface Mount (PLCC socket-compatible) |
| Configuration Memory | — | EPROM (UV-erasable) |
| Estado RoHS | — | [DATA_NEEDED: RoHS status not in provided web data] |