EPM5192ALC84-15 vs EPM5192ALC84-20 对比

详细并排对比 EPM5192ALC84-15 出自 Altera 和 EPM5192ALC84-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192ALC84-15 EPM5192ALC84-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $13.20 $19.40
Device Family MAX 5000 (EPM5192) —
Device Type CPLD / UV-Erasable / OTP Complex PLD UV-Erasable/OTP Complex PLD (EPLD)
Macrocells 192 192
Dedicated Inputs 7 —
User I/O Pins 64 —
Propagation Delay (tPD) 15 ns —
Propagation Delay (Industry Variant) 25 ns (per MicrochipUSA listing) —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) —
Process Technology CMOS (EPROM-based) CMOS
Programmability UV-erasable window / OTP —
封装 84-pin PLCC (QCCJ, J-bend ceramic) 84-pin PLCC (Plastic Leaded Chip Carrier)
Operating Temperature Grade Commercial —
Terminal Form J-BEND J-bend
Package Code QCCJ QCCJ (PLCC-84)
Package Shape SQUARE Square
Architecture Programmable Logic Array + Macrocell Registers + PIA interconnect —
Series — Altera MAX 5000
Speed Grade — -20 (20 ns pin-to-pin delay)
Terminal Pitch — 1.270 mm
Temperature Grade — Commercial
Programming Method — UV-erase + EPROM (One-Time-Programmable option)
Logic Family — MAX 5000 EPLD
I/O Compatibility — TTL-compatible
安装类型 — Surface Mount (PLCC socket-compatible)
Configuration Memory — EPROM (UV-erasable)
RoHS 状态 — [DATA_NEEDED: RoHS status not in provided web data]

数据手册与资源

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