EPM7128SLC84-7N vs EPM7128SLC8410 Comparación
Comparación detallada lado a lado de EPM7128SLC84-7N por Intel y EPM7128SLC8410 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128SLC84-7N | EPM7128SLC8410 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,75 | $9,75 |
| Series | MAX 7000S | — |
| Programmable Type | In System Programmable (ISP) | — |
| Tipo de memoria | EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Elements/Blocks | 8 (Logic Array Blocks) | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/O Pins | 68 | — |
| Propagation Delay (tpd) Max | 7.5 ns | — |
| Maximum Operating Frequency | 125 MHz | 125 MHz (counter) |
| Counter Speed (Internal) | up to 175.4 MHz (family max) | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V (5 V nominal) |
| Temperatura de funcionamiento | 0 C to +70 C (Commercial) | 0C to +70C (commercial) |
| Encapsulado | 84-LCC (J-Lead), PLCC-84 | 84-pin PLCC (J-lead) |
| Tipo de montaje | Surface Mount | Surface Mount (PLCC socket or direct solder) |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | Compliant (lead-free 'N' suffix) | [DATA_NEEDED: RoHS status - not stated in verified data] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Family | — | MAX 7000S |
| Macrocells | — | 128 |
| Logic Elements / Gates | — | 2500 usable gates |
| User I/O Pins | — | 68 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 10 ns |
| Setup Time (tSU) | — | 7 ns |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |