EPM7128SLC84-7N vs EPM7128SLC8410 Comparison

Detailed side-by-side comparison of EPM7128SLC84-7N by Intel and EPM7128SLC8410 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SLC84-7N EPM7128SLC8410
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Series MAX 7000S —
Programmable Type In System Programmable (ISP) —
Memory Type EEPROM —
Number of Macrocells 128 —
Number of Logic Elements/Blocks 8 (Logic Array Blocks) —
Number of Usable Gates 2,500 —
Number of I/O Pins 68 —
Propagation Delay (tpd) Max 7.5 ns —
Maximum Operating Frequency 125 MHz 125 MHz (counter)
Counter Speed (Internal) up to 175.4 MHz (family max) —
Supply Voltage (VCCINT) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V (5 V nominal)
Operating Temperature 0 C to +70 C (Commercial) 0C to +70C (commercial)
Package 84-LCC (J-Lead), PLCC-84 84-pin PLCC (J-lead)
Mounting Type Surface Mount Surface Mount (PLCC socket or direct solder)
MSL Level [DATA_NEEDED: MSL level] —
RoHS Status Compliant (lead-free 'N' suffix) [DATA_NEEDED: RoHS status - not stated in verified data]
Product Type — CPLD (Complex Programmable Logic Device)
Family — MAX 7000S
Macrocells — 128
Logic Elements / Gates — 2500 usable gates
User I/O Pins — 68
Number of Logic Array Blocks (LABs) — 8
Propagation Delay (tPD) — 10 ns
Setup Time (tSU) — 7 ns
I/O Voltage (MultiVolt) — 2.5 V / 3.3 V / 5.0 V
Program Memory Type — EEPROM (in-system programmable)
JTAG Support — IEEE Std 1149.1 boundary-scan

Datasheets & Resources

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