EPM7128SQC100-15 vs EPM7128STC100-10 Comparación
Comparación detallada lado a lado de EPM7128SQC100-15 por Altera y EPM7128STC100-10 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel
EPM7128SQC100-15 ⚠ Última compraAltera
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 ObsoleteComparación de especificaciones
| Parámetro | EPM7128SQC100-15 | EPM7128STC100-10 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,20 | $7,10 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| User I/Os | 84 | 84 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX value] | — |
| Typical Gate Count | 2,500 gates | — |
| Supply Voltage (VCCINT) | 5 V (5% tolerance) | 5 V |
| Programming Technology | EEPROM (in-system programmable via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| Encapsulado | 100-pin PQFP (Plastic Quad Flat Pack) | TQFP-100 (C100) |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | 3 (168 hours) | — |
| Estado RoHS | Non-compliant (SnPb lead finish - legacy PQFP) | [DATA_NEEDED: RoHS compliance status not in provided data] |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks | — | 8 (16 macrocells per LAB) |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Counter Frequency (fCNT) | — | 100 MHz |
| Logic Family | — | CMOS |
| MultiVolt I/O Voltage | — | 3.3 V / 5 V |
| Recuento de pines | — | 100 |
| Programmability | — | In-System Programmable (JTAG, IEEE 1149.1), EEPROM |