EPM7128SQC100-15 vs EPM7128STC100-10 对比
详细并排对比 EPM7128SQC100-15 出自 Altera 和 EPM7128STC100-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 Obsolete规格对比
| 参数 | EPM7128SQC100-15 | EPM7128STC100-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.20 | $7.10 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| User I/Os | 84 | 84 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX value] | — |
| Typical Gate Count | 2,500 gates | — |
| Supply Voltage (VCCINT) | 5 V (5% tolerance) | 5 V |
| Programming Technology | EEPROM (in-system programmable via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| 封装 | 100-pin PQFP (Plastic Quad Flat Pack) | TQFP-100 (C100) |
| 工作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | 3 (168 hours) | — |
| RoHS 状态 | Non-compliant (SnPb lead finish - legacy PQFP) | [DATA_NEEDED: RoHS compliance status not in provided data] |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks | — | 8 (16 macrocells per LAB) |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Counter Frequency (fCNT) | — | 100 MHz |
| Logic Family | — | CMOS |
| MultiVolt I/O Voltage | — | 3.3 V / 5 V |
| 引脚数量 | — | 100 |
| Programmability | — | In-System Programmable (JTAG, IEEE 1149.1), EEPROM |