EPM9320ALI84-10N vs EPM9320BC356-15 Comparación
Comparación detallada lado a lado de EPM9320ALI84-10N por Altera y EPM9320BC356-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9320ALI84-10N | EPM9320BC356-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $21,95 | $31,20 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | MAX (Multiple Array MatriX), 3rd generation | Multiple Array MatriX (MAX) - third generation |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Usable Gates | 6,000 to 12,000 | — |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 20 | — |
| User I/O Pins | 56 | — |
| Pin-to-Pin Delay | 10 ns | — |
| Maximum Counter Frequency | 144.9 MHz | — |
| VCCINT (Core Supply) | 5.0 V | — |
| VCCIO (I/O Supply) | 3.3 V or 5.0 V | — |
| Input Logic Levels | TTL-compatible (at 5.0 V VCCINT) | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes (5.0-V ISP via JTAG) |
| Encapsulado | 84-pin PLCC (J-lead, 1.270 mm pitch) | 356-ball LBGA (BGA-356, 35x35 mm) |
| Tipo de montaje | Surface Mount (PLCC socket compatible) | Surface Mount |
| Temperatura de funcionamiento | -40C to +85C (industrial) | — |
| Configuration Memory | EEPROM, non-volatile | — |
| Pin-to-Pin Delay (max) | — | 15 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5.0 V typical) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| Programmable Type | — | In System Programmable |
| Operating Temperature Grade | — | Commercial |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |