EPM9560RC208-21 vs EPM9560RC210-20 Comparación
Comparación detallada lado a lado de EPM9560RC208-21 por Intel y EPM9560RC210-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC208-21 - MAX 9000 CPLD, 560 Macrocells, 208-Pin RQFP | Intel (Altera)
EPM9560RC208-21 ⚠ Última compraComparación de especificaciones
| Parámetro | EPM9560RC208-21 | EPM9560RC210-20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,95 | $60,00 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX), third-generation | — |
| Technology | CMOS EEPROM-based | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Flip-Flops | 772 | — |
| Maximum User I/O | 149 | [DATA_NEEDED: 212 I/O per datasheet, package-dependent] |
| Propagation Delay (speed grade -21) | 21 ns (max, per speed grade designation) | — |
| Tensión de alimentación | 5.0 V | 5 V |
| I/O Voltage Tolerance | 3.3 V or 5 V (per variant) | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes (MAX+PLUS II flow) |
| Encapsulado | 208-pin RQFP (Power Quad Flat Pack) | RQFP-210 (Power Quad Flat Pack, 0.5mm pitch) |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial or commercial grade -21 suffix] | [DATA_NEEDED: commercial 0C to 70C typical; industrial variants exist] |
| Configuration Memory | EEPROM (non-volatile) | — |
| Security Bit | Yes (programmable) | — |
| Estado RoHS | [DATA_NEEDED: confirm RoHS compliance for -21 variant] | RoHS3 Compliant (per supplier listing) |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Clock-to-Output (tCO) | — | 12 ns |
| Process Technology | — | 0.65 um EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std 1149.1 compliant |
| Tipo de montaje | — | Surface Mount |