M7AFS600-FGG484I vs AFS600-FGG484 Comparación
Comparación detallada lado a lado de M7AFS600-FGG484I por Microchip Technology y AFS600-FGG484 por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
M7AFS600-FGG484I - Fusion FPGA 600K Gates 484-BGA | Microchip
M7AFS600-FGG484I ✓ Activo
Comparación de especificaciones
| Parámetro | M7AFS600-FGG484I | AFS600-FGG484 |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $219,20 | $0,00 |
| Programmable Logic Family | Fusion (Microsemi/Actel, now Microchip) | — |
| System Gates | 600000 gates | 600000 gates |
| Embedded Processor | ARM CoreMP7 (ARM7TDMI-compatible) | — |
| User I/O | 172 I/O | — |
| Configuration Technology | Flash-based, on-chip | — |
| Core Supply Voltage | 1.5 V | — |
| Encapsulado | 484-BGA (FGG484), 1.0 mm ball pitch | 484-pin FBGA; one verified source alternatively labels BGA-256 |
| Tipo de montaje | Surface Mount | Surface mount |
| Temperatura de funcionamiento | -40C to +100C (industrial, I grade) | 0 C to 70 C |
| Memory - Listable Resource | 110592 (per DigiKey listing) | — |
| Maximum Operating Frequency | [DATA_NEEDED: maximum operating frequency] | — |
| I/O Bank Count | [DATA_NEEDED: I/O bank count] | — |
| Embedded Flash Blocks | [DATA_NEEDED: embedded flash block count] | — |
| Analog Peripherals | [DATA_NEEDED: analog peripheral configuration] | — |
| Nivel MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | — |
| Programming Tool Chain | Microchip Libero SoC (formerly Actel Libero) | — |
| Device Type | — | Fusion mixed-signal FPGA |
| Maximum Frequency | — | 1098.9 MHz |
| Technology | — | 130 nm |
| Metal Layers | — | 7 layers |
| Process | — | Flash-based CMOS |
| Tensión de alimentación | — | 1.5 V |
| I/O Count | — | 172 I/O |
| Configuration Retention | — | Nonvolatile flash |
| Power-Up Feature | — | Live at Power-Up (LAPU) |
| Architecture | — | Monolithic mixed-signal FPGA |
| Programmable Logic | — | High-performance flash-based programmable logic |
| Analog Resources | — | Configurable analog resources |
| Flash Memory | — | Large flash-memory blocks |
| Clocking | — | Comprehensive clock generation and management circuitry |
| Processor Support | — | Optional ARM support |
| Estado del ciclo de vida | — | [DATA_NEEDED: current lifecycle status] |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance status] |
| REACH Compliance | — | [DATA_NEEDED: REACH compliance status] |