MPC8536AVTAQG vs MPC8536EAVTAQG Comparación
Comparación detallada lado a lado de MPC8536AVTAQG por NXP Semiconductors y MPC8536EAVTAQG por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndComparación de especificaciones
| Parámetro | MPC8536AVTAQG | MPC8536EAVTAQG |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $171,00 | $218,75 |
| Processor Type | PowerPC e500 Microprocessor IC MPC85xx | — |
| Core Architecture | PowerPC e500 (Book-E compliant) | — |
| Number of Cores | 1 | 1 |
| Ancho del bus de datos | 32-bit | 32 bit |
| Frecuencia de reloj máxima | 1.0 GHz | 1.0 GHz |
| Core Supply Voltage | 1.0 V | — |
| I/O Voltage | 1.8 V, 2.5 V, 3.3 V | — |
| Encapsulado / Carcasa | 783-FCPBGA (29x29 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Memory Controller | DDR2, DDR3 (64-bit with ECC) | — |
| Ethernet | 2x 10/100/1000 Mbps (eTSEC, SGMII) | — |
| USB | USB 2.0 (ULPI interface) | — |
| Security Engine | AES, 3DES, SHA-1/SHA-2, MD-5, public-key acceleration | — |
| Datapath Acceleration | Hardware packet parsing, classification, policing | — |
| Local Bus | 16-bit data, 32-bit address | — |
| Operating Temperature Grade | Commercial | — |
| Processor Series | — | MPC85xx (PowerQUICC III) |
| Core | — | PowerPC e500, 32-bit |
| Encapsulado | — | 783-FCPBGA (29x29 mm) |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Tensión de alimentación | — | [DATA_NEEDED: core/IO supply voltage] |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance] |