MPC8536AVTAQG vs MPC8536EAVTAQG Comparaison
Comparaison détaillée côte à côte de MPC8536AVTAQG par NXP Semiconductors et MPC8536EAVTAQG par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndComparaison des spécifications
| Paramètre | MPC8536AVTAQG | MPC8536EAVTAQG |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $218,75 |
| Processor Type | PowerPC e500 Microprocessor IC MPC85xx | — |
| Core Architecture | PowerPC e500 (Book-E compliant) | — |
| Number of Cores | 1 | 1 |
| Largeur du bus de données | 32-bit | 32 bit |
| Fréquence d'horloge maximale | 1.0 GHz | 1.0 GHz |
| Core Supply Voltage | 1.0 V | — |
| I/O Voltage | 1.8 V, 2.5 V, 3.3 V | — |
| Boîtier / Format | 783-FCPBGA (29x29 mm) | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Memory Controller | DDR2, DDR3 (64-bit with ECC) | — |
| Ethernet | 2x 10/100/1000 Mbps (eTSEC, SGMII) | — |
| USB | USB 2.0 (ULPI interface) | — |
| Security Engine | AES, 3DES, SHA-1/SHA-2, MD-5, public-key acceleration | — |
| Datapath Acceleration | Hardware packet parsing, classification, policing | — |
| Local Bus | 16-bit data, 32-bit address | — |
| Operating Temperature Grade | Commercial | — |
| Processor Series | — | MPC85xx (PowerQUICC III) |
| Core | — | PowerPC e500, 32-bit |
| Boîtier | — | 783-FCPBGA (29x29 mm) |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Tension d'alimentation | — | [DATA_NEEDED: core/IO supply voltage] |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance] |