SN65LVDS105PWR vs TD1205 Comparación
Comparación detallada lado a lado de SN65LVDS105PWR por Texas Instruments y TD1205 por TD next. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
SN65LVDS105PWR - 1:4 LVDS Clock Fanout Buffer 400Mbps | TI
SN65LVDS105PWR ✓ Activo
Comparación de especificaciones
| Parámetro | SN65LVDS105PWR | TD1205 |
|---|---|---|
| Marca | Texas Instruments | TD next |
| Categoría | Clock & Timing | RF Modules |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,28 | $10,50 |
| Función | 1 LVTTL input to 4 LVDS output repeater / fanout buffer | — |
| Velocidad de datos | 400 Mbps | — |
| Max Clock Frequency | 400 MHz | — |
| Tensión de alimentación | 3 V to 3.6 V (typical 3.3 V) | [DATA_NEEDED: VBAT operating range] |
| Input Type | LVTTL (single-ended) | — |
| Tipo de salida | LVDS (differential), 4 pairs | — |
| Output Voltage (typical) | 350 mV into 100 ohm load | — |
| Standard Compliance | ANSI EIA/TIA-644 LVDS | — |
| Canales | 1 x 1:4 | — |
| Encapsulado | 16-TSSOP (PW) | — |
| Tipo de montaje | Surface Mount | Surface Mount (reflow) |
| Technology | LVDS differential signaling | — |
| Categoría | Signal Buffers, Repeaters, Splitters - Clock Buffer | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40C to +85C |
| Corriente en reposo | [DATA_NEEDED: quiescent current] | — |
| Input Rise/Fall Time Note | TTL/CMOS rise/fall < 500 ps may require low-Dk laminate per TI layout guidance | — |
| Product Type | — | Sigfox-certified RF transceiver module |
| Manufacturer | — | TD next (Telecom Design) |
| RF Protocol | — | Sigfox (Ultra-Narrow-Band LPWAN) |
| Operating Frequency (RC1) | — | 868 MHz (ETSI Europe) |
| Operating Frequency (RC2) | — | 902-928 MHz (US, Australia, Japan) |
| Tx Power (RC1) | — | +14 dBm typical |
| Tx Power (RC2) | — | +22 dBm maximum |
| Receiver Sensitivity | — | [DATA_NEEDED: receiver sensitivity] |
| Integrated Microcontroller | — | ARM Cortex-M0+ (STM32 family) |
| Clock Reference | — | Integrated TCXO |
| Host Interface | — | UART, SPI, I2C, GPIO |
| Modulation | — | Ultra-Narrow-Band (UNB), DBPSK uplink |
| Maximum Payload Size | — | 12 bytes per uplink message |
| Form Factor | — | Surface-mount LGA castellation module |
| Estado RoHS | — | Compliant |