XC6SLX16-2FT256C vs XC6SLX16-2FTG256C Comparación
Comparación detallada lado a lado de XC6SLX16-2FT256C por AMD y XC6SLX16-2FTG256C por AMD. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC6SLX16-2FT256C | XC6SLX16-2FTG256C |
|---|---|---|
| Marca | AMD | AMD |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Device Type | FPGA | — |
| FPGA Family | Spartan-6 LX | — |
| Configurable Logic Cells | 14,579 cells | — |
| Configurable Logic Blocks | 1,139 CLBs | — |
| Internal Frequency | 667 MHz | — |
| I/O Count | 186 I/O | — |
| Process Technology | 45 nm CMOS | — |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | -2 | -2 |
| Temperature Grade | C, commercial | — |
| Temperatura de funcionamiento | 0°C to 85°C | 0 °C to +85 °C (Commercial) |
| Encapsulado | 256-LBGA | 256-ball Fine-Pitch Thin BGA (FTG256), 17×17 mm, 1.0 mm pitch |
| Terminal Count | 256 terminals | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Lead-Free Status | Lead free | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| REACH Status | [DATA_NEEDED: REACH compliance status] | — |
| Block RAM | [DATA_NEEDED: block RAM capacity] | — |
| DSP Resources | [DATA_NEEDED: DSP resource count] | — |
| Family | — | Spartan-6 LX |
| Logic Cells | — | 14,579 |
| Configurable Logic Blocks (CLBs) | — | 1,139 |
| Slices | — | 2,278 |
| Block RAM Bits | — | 589,824 bits |
| Block RAM Blocks (18 Kb) | — | 32 |
| DSP Slices (18×18 multipliers) | — | 32 |
| Maximum User I/Os | — | 186 |
| Maximum Single-Ended I/O Banks | — | 4 |
| Process Node | — | 45 nm CMOS, 9-metal layer |
| Supply Voltage (Core) | — | 1.2 V nominal |
| Lead-Free / RoHS | — | Yes (compliant) |
| Configuration Modes | — | JTAG, SPI (x1/x2/x4), BPI (x8/x16), Slave-Parallel |
| Clock Management Tiles (CMTs) | — | 2 (each with PLL + MMCM) |
| PCIe Support | — | Soft IP only (no integrated PCIe hard cores) |