DP83822HFRHBR - 10/100 Mbps Ethernet PHY Transceiver | Texas Instruments
N.º de pieza: DP83822HFRHBR ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $4.2 | $4,20 |
| 10 | $3.78 | $37,80 |
| 100 | $3.36 | $336,00 |
| 500 | $2.99 | $1.495,00 |
| 1.000 | $2.66 | $2.660,00 |
DP83822HFRHBR Descripción general
An Ethernet PHY (Physical Layer Device) is the lowest layer of the OSI networking stack and handles the analog signaling, clock recovery, line coding (MLT-3 / PAM), and link-state machine on the cable side, presenting a digital MII/RMII/RGMII bus to the MAC on the host side. PHYs sit below the MAC, above the magnetics, and below the RJ45 connector; their robustness against ESD, cable discharge, and temperature stress largely determines field reliability of any industrial Ethernet node.
Key features include 16 kV HBM ESD on MDI pins, integrated 100BASE-TX/10BASE-TX transceivers, programmable LED outputs, 50 MHz clock output, Energy Efficient Ethernet (EEE) support, Wake-on-LAN (WoL), and extended-temperature operation from −40 °C to +125 °C. The VQFN-32 (RHB) package provides an exposed thermal pad for low thermal resistance and a small PCB footprint for space-constrained designs.
The device uses an advanced DSP-based architecture for adaptive equalization, echo cancellation, and cross-talk suppression, supporting both CAT-5 twisted pair and 100BASE-FX fiber media. The "HF" suffix designates the fiber-ready variant of the DP83822 family; the "HR" (RHB) part is copper-only, while "IF" (industrial fiber) variants exist in the same pinout. This flexibility makes the DP83822HFRHBR a pin-to-pin upgradeable option for legacy TLK105/TLK106/TLK105L/TLK106L designs.
Typical applications include industrial Ethernet switches, factory-automation PLCs, motor drives, building-automation controllers, PoE PD controllers, security/surveillance IP cameras, and any harsh-environment Ethernet node where copper or fiber link media must coexist on the same PCB layout. It is widely used in IEC 61850 substation gateways and PROFINET nodes.
Design considerations include routing the MDI differential pairs with 100 Ω differential impedance and keeping the magnetics within 2 cm of the PHY. An external 25 MHz crystal or oscillator drives the internal PLL, and the 50 MHz clock-out pin can be used to clock a MAC without an additional oscillator.
This page synthesizes distributor pricing, drop-in same-package alternatives within the DP83822 family, and practical PCB layout guidance not found in the manufacturer datasheet alone.
Alternativas directas para DP83822HFRHBR — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con DP83822HFRHBR (mismo factor de forma y huella) — difiere en Package, MAC Interface, Cable Diagnostics, Clock Output, Fiber Support.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
DP83822HRHBR
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DP83822IFRHBR
✅ Sustitución directa✓ En stock
Consulte el precio
Ver hoja de datos →DP83822HFRHBT
✅ Sustitución directa✓ En stock
$1.85 / unidad
Ver hoja de datos →DP83822IRHBR
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
DP83822HFRHBR Especificaciones
| Product Type | Ethernet Physical Layer Transceiver (PHY) |
| Velocidad de datos | 10/100 Mbps |
| Number of Ports | Single |
| MAC Interface | MII / RMII / RGMII |
| Media Support | Twisted Pair (CAT-5) and Fiber (100BASE-FX) |
| ESD Protection (MDI pins) | 16 kV HBM |
| Tensión de alimentación | 3.3 V (single supply) |
| Rango de temperatura de funcionamiento | -40 °C to +125 °C (extended) |
| Encapsulado | 32-pin VQFN (RHB), 5 mm × 5 mm |
| Tipo de montaje | Surface Mount |
| Crystal / Clock Input | 25 MHz (with integrated PLL) |
| Clock Output | 50 MHz (CMOS) |
| Power-Saving Modes | Energy Efficient Ethernet (EEE), Wake-on-LAN (WoL) |
| LED Outputs | Programmable, multi-function |
| Cable Diagnostics | Built-in TDR-based cable analysis |
| Estado RoHS | Compliant |
Configuración de pines de DP83822HFRHBR
| Pin 1 | TX_CLK — MII transmit clock output |
| Pin 2 | TX_EN — MII transmit enable |
| Pin 3 | TXD_0 — MII transmit data bit 0 |
| Pin 4 | TXD_1 — MII transmit data bit 1 |
| Pin 5 | TXD_2 — MII transmit data bit 2 |
| Pin 6 | TXD_3 — MII transmit data bit 3 |
| Pin 7 | RX_CLK — MII receive clock output |
| Pin 8 | RX_DV — MII receive data valid |
| Pin 9 | RX_ER — MII receive error |
| Pin 10 | RXD_0 — MII receive data bit 0 |
| Pin 11 | RXD_1 — MII receive data bit 1 |
| Pin 12 | RXD_2 — MII receive data bit 2 |
| Pin 13 | RXD_3 — MII receive data bit 3 |
| Pin 14 | CRS — Carrier sense |
| Pin 15 | COL — Collision detect |
| Pin 16 | MDC — Management data clock |
| Pin 17 | MDIO — Management data I/O |
| Pin 18 | RESET — Hardware reset (active low) |
| Pin 19 | XI — 25 MHz crystal input |
| Pin 20 | XO — 25 MHz crystal output |
| Pin 21 | CLKOUT — 50 MHz reference clock output |
| Pin 22 | LED_0 — Programmable LED output 0 |
| Pin 23 | LED_1 — Programmable LED output 1 |
| Pin 24 | LED_2 — Programmable LED output 2 |
| Pin 25 | RD+ — Differential receive positive |
| Pin 26 | RD- — Differential receive negative |
| Pin 27 | TD+ — Differential transmit positive |
| Pin 28 | TD- — Differential transmit negative |
| Pin 29 | FX_SD — Fiber signal detect (FX mode) |
| Pin 30 | VDDIO — I/O supply 3.3 V |
| Pin 31 | VDD — Core supply 3.3 V |
| Pin 32 | GND — Ground (must connect to thermal pad) |
Aplicaciones típicas
DP83822HFRHBR es adecuado para 6 aplicacións: Industrial Ethernet Switch / Fieldbus Node, Motor Drive and Field-Oriented Control (FOC) Servo, Building Automation and HVAC Controller, IP Security Camera / Surveillance Network, Factory Automation PLC and Remote I/O, Telecom Aggregation Equipment / PoE Midspan.
Industrial Ethernet Switch / Fieldbus Node
The DP83822HFRHBR is a natural fit for managed and unmanaged industrial Ethernet switches, PROFINET and EtherNet/IP slave nodes, and IEC 61850 substation gateways. Its 16 kV HBM ESD on MDI pins and −40 °C to +125 °C operating range survive cabinet-level surge events and outdoor temperature swings that destroy commercial-grade PHYs. Both copper (100BASE-TX) and fiber (100BASE-FX) are supported on the same PCB footprint, so a single switch design can be configured for copper daisy-chains or fiber ring topologies by changing only the magnetics. Compared to a gigabit PHY like DP83867, the DP83822HFRHBR consumes ~30% less power and fits in a smaller 32-pin VQFN footprint.
Recomendado
Motor Drive and Field-Oriented Control (FOC) Servo
Modern variable-frequency drives and servo controllers expose a 10/100 Mbps Ethernet interface for parameterization, firmware updates, and real-time motion feedback over EtherCAT or PROFINET. The DP83822HFRHBR's fiber-ready FX port isolates the noisy drive environment from upstream controllers, eliminating common-mode ground loops that corrupt communication on long motor cables. Its industrial −40 °C to +125 °C range tolerates the high ambient temperatures inside drive enclosures. The 50 MHz clock-out pin can clock the host MCU or DSP without an extra oscillator, reducing BOM cost in cost-sensitive drive designs.
Recomendado
Building Automation and HVAC Controller
BACnet/IP, Modbus TCP, and KNX/IP gateways in commercial buildings all run on 10/100 Ethernet and benefit from the DP83822HFRHBR's low power consumption and small 5×5 mm VQFN-32 footprint. The integrated Energy Efficient Ethernet (EEE) feature reduces link power when the building controller is idle, lowering overall system energy budget for always-on BMS nodes. The single 3.3 V supply and Wake-on-LAN support simplify power-tree design and enable remote wake for service technician diagnostics without bringing the entire HVAC system online.
Recomendado
IP Security Camera / Surveillance Network
Outdoor PoE-powered IP cameras require a robust PHY that survives cable-discharge events on long CAT-5 or CAT-6 runs through building raceways. The DP83822HFRHBR's 16 kV HBM ESD on MDI pins protects the camera's Ethernet interface against indirect lightning-induced transients, eliminating the need for a separate TVS diode array in most designs. Its EEE mode lowers average power consumption during low-traffic nighttime operation, critical for solar or battery-backed surveillance installations. The fiber-ready variant supports long-distance camera backhaul over 100BASE-FX when copper reach (>100 m) is insufficient.
Recomendado
Factory Automation PLC and Remote I/O
Modular PLCs and remote I/O racks use 10/100 Ethernet to backplane-link the CPU to distributed I/O over PROFINET or EtherNet/IP. The DP83822HFRHBR's fiber-ready FX interface supports long-distance (>2 km) fiber runs between factory floor and control room, while copper ports handle local I/O racks within a single cabinet. Its industrial temperature grade and ESD rating align with IEC 61131-2 industrial environment requirements. The pin-to-pin compatibility with DP83867 upward allows designs to start at 10/100 and migrate to gigabit uplinks without PCB rework.
Recomendado
Telecom Aggregation Equipment / PoE Midspan
PoE midspans and small-cell telecom aggregation equipment require a low-power, reliable 10/100 PHY for management ports and for powering downstream IP cameras, Wi-Fi access points, and VoIP phones. The DP83822HFRHBR cooperates with TI's TPS23750 / TPS23753 PoE PD controllers and survives PoE hot-plug transients on the MDI pins without external protection. Its small 5×5 mm VQFN-32 footprint and 3.3 V single-supply operation fit easily into 1U rack-mounted aggregation chassis with dense port counts. Energy Efficient Ethernet mode lowers aggregate idle power across hundreds of ports.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para DP83822HFRHBR — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | DP83822HRHBR | DP83822IFRHBR | DP83822HFRHBT | DP83822IRHBR |
|---|---|---|---|---|---|
| Package | VQFN-32 (RHB) 5x5 mm | VQFN-32 (RHB) 5x5 mm - same | VQFN-32 (RHB) 5x5 mm - same | VQFN-32 (RHB) 5x5 mm - same | VQFN-32 (RHB) 5x5 mm - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Data Rate | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps |
| Media Support | Copper + 100BASE-FX Fiber | Copper only | Copper + Fiber | Copper + Fiber | Copper only |
| MAC Interface | MII / RMII / RGMII | MII / RMII / RGMII | MII / RMII / RGMII | MII / RMII / RGMII | MII / RMII / RGMII |
| Operating Temperature | -40 °C to +125 °C (extended) | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C |
| ESD Rating (MDI) | 16 kV HBM | 16 kV HBM | 16 kV HBM | 16 kV HBM | 16 kV HBM |
| Supply Voltage | 3.3 V single | 3.3 V single | 3.3 V single | 3.3 V single | 3.3 V single |
Diferenciadores clave
- Fiber-ready (100BASE-FX) on the same PCB footprint as copper-only variants (frente a DP83822HRHBR)
- Industrial extended-temperature range −40 °C to +125 °C (frente a DP83822IRHBR (industrial, copper-only))
- 16 kV HBM ESD on MDI pins eliminates external TVS protection (frente a TLK105L / TLK106L legacy PHYs)
Notas de diseño
Route the MDI differential pairs (TD+/TD- and RD+/RD-) with 100 Ω differential impedance on the top layer over a continuous ground reference plane. Keep the magnetics within 2 cm of the PHY to minimize common-mode emissions. The exposed thermal pad (pin 33) MUST be soldered to a continuous ground pour with at least 8 thermal vias to the inner ground plane for proper heat dissipation and electrical reference. Place the 25 MHz crystal as close as possible to XI/XO with short symmetric traces and a guard ring to GND.
Keep the analog 3.3 V supply (VDDA) and digital 3.3 V supply (VDDIO) separated by a ferrite bead if the PHY is fed from a switching regulator. The DP83822HFRHBR's analog PLLs and ADC are sensitive to switch-mode noise on the supply rail, which appears as increased jitter on the recovered clock. If using the integrated DC-DC controller option in the same family, follow the layout note in the datasheet's layout section to avoid magnetic coupling between the inductor and the MDI traces.
Strap options (RX_DV/MODE2, RX_ER/MODE1, CRS/MODE0) at reset select MII/RMII/RGMII and several PHY addresses — incorrect strapping is the #1 cause of "no link" troubleshooting tickets. Always re-check strap values when porting firmware between DP83822 variants (HF vs HR vs IF). Also remember the FX_SD pin requires a 4.7 kΩ pull-up to VDD when 100BASE-FX fiber mode is used; leaving it floating prevents fiber link-up even though copper still works.
The DP83822HFRHBR includes adaptive equalization and baseline wander correction that automatically compensate for CAT-5 cable length up to 100 m. For non-standard cables (e.g., 120 Ω PROFIBUS or 150 Ω shielded twisted pair), manually set the AGS (automatic gain setting) register via MDIO to optimize BER performance. Cable diagnostics (TDR) available through MDIO registers can locate opens/shorts to within ±1 m, useful for field installation troubleshooting.
Información de cumplimiento
RoHS and REACH compliance per TI product page; AEC-Q100 not applicable for Ethernet PHY transceivers (automotive-grade DP83826 variant exists separately). Halogen-free status not stated in available data — set to 'unknown' per Data Authenticity Rule 2.
