EP2A25F672I9N vs EP2A25F672I-9 مقایسه
مقایسه دقیق کنار به کنار EP2A25F672I9N توسط Intel و EP2A25F672I-9 توسط Intel. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
مقایسه مشخصات
| پارامتر | EP2A25F672I9N | EP2A25F672I-9 |
|---|---|---|
| برند | Intel | Intel |
| دسته‌بندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | Obsolete | Obsolete |
| Series | APEX II (EP2A25) | — |
| Family | APEX II | APEX II |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| Logic Elements / Cells | 24,320 | — |
| System Gates | 900,000 (typical) | — |
| Process Technology | 0.15 µm CMOS | 0.18 µm CMOS |
| Maximum Internal Frequency | 236 MHz | — |
| Propagation Delay (tpd) | 2.23 ns | — |
| Core Supply Voltage (VCCINT) | 1.5 V nominal (1.425 V to 1.525 V) | — |
| I/O Supply Voltage | [DATA_NEEDED: VCCIO range] | — |
| بسته‌بندی | 672-pin FC-FBGA | 672-pin FCBGA (FineLine BGA) |
| نوع نصب | Surface Mount | Surface Mount (BGA) |
| دمای کاری | -40 °C to +85 °C (Industrial, 'I' suffix) | — |
| Speed Grade | 9 (fastest commercial APEX II) | -9 |
| Embedded System Blocks (ESB) | Yes (on-chip RAM/ROM) | — |
| PLLs | 4 | — |
| Configuration | JTAG / in-system programmable | — |
| وضعیت RoHS | [DATA_NEEDED: confirmed] | [DATA_NEEDED: RoHS status] |
| سطح MSL | [DATA_NEEDED] | — |
| AEC-Q100 | not_applicable | — |
| Logic Elements (typical) | — | 25,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESB) Memory | — | 1,125 Kbits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O pins] |
| Number of PLLs | — | 4 |
| Core Voltage | — | 1.5 V / 1.8 V (speed-grade dependent) |
| Operating Temperature Grade | — | Industrial (-40 °C to +100 °C junction) |
| سطح حساسیت به رطوبت (MSL) | — | 3 (per Vyrian listing) |
| Peak Reflow Temperature | — | 220 °C (per Vyrian listing) |
| Configuration Method | — | JTAG / serial configuration EPROM |
| Supported I/O Standards | — | LVTTL, LVCMOS, LVDS, PCI |
| Legacy Status | — | Obsolete - consult Altera / Intel FPGA archive for documentation |