EPC16UC88 vs EPC16UC80 مقایسه
مقایسه دقیق کنار به کنار EPC16UC88 توسط Altera و EPC16UC80 توسط Altera. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
مقایسه مشخصات
| پارامتر | EPC16UC88 | EPC16UC80 |
|---|---|---|
| برند | Altera | Altera |
| دسته‌بندی | Memory ICs | Memory ICs |
| وضعیت چرخه عمر | Unknown | آخرین فرصت خرید |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| ولتاژ تغذیه | 3.3 V core and I/O | — |
| بسته‌بندی | 88-UBGA (11x8) | 80-ball UBGA (Ultra FineLine BGA), 11x8 mm |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | Yes (IEEE 1149.1 JTAG) |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| نوع نصب | Surface mount | Surface Mount |
| Package Dimensions | 11 mm x 8 mm | — |
| وضعیت RoHS | [DATA_NEEDED: RoHS status] | — |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| دمای کاری | [DATA_NEEDED: operating temperature] | -40 C to +85 C (industrial) |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Memory Density | — | 16 Mbit |
| Device Family | — | EPC4 / EPC8 / EPC16 Enhanced Configuration Device |
| Configuration Memory Sections | — | 8 (multi-boot capable) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Configuration Clock (DCLK) | — | Up to 33 MHz (FPP mode) |
| Configuration Modes | — | FPP, PS, JTAG |
| رابط | — | Parallel data + DCLK + nSTATUS + nCONFIG + CONFIG_DONE |
| Endurance | — | 100,000 erase/program cycles (per datasheet) |
| Supported Target FPGAs | — | Stratix/II/III/GX, Cyclone/II/III, APEX 20K/II/IIE, Mercury |
| Lead-Free / RoHS | — | Compliant per Altera product page |
| Multi-Device Daisy-Chain | — | Yes |