2EDN7524GXTMA1 vs 2ED21064S06JXUMA1 Comparaison
Comparaison détaillée côte à côte de 2EDN7524GXTMA1 par Infineon et 2ED21064S06JXUMA1 par Infineon. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ ActifComparaison des spécifications
| Paramètre | 2EDN7524GXTMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| Marque | Infineon | Infineon |
| Catégorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,82 | $0,85 |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | 10 V to 20 V |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| Temps de montée | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Temps de descente | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| Température de fonctionnement | -40 C to +125 C | -40C to +125C |
| Boîtier | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-14 (14-pin SOIC) |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Statut RoHS | Compliant | ROHS3 Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| Fonction | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| Topologie | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Bootstrap Diode | — | Integrated |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Negative Gate Drive Robustness | — | -0.7 V |