2EDN7524GXTMA1 vs 2ED21064S06JXUMA1 比較
詳細な並列比較: 2EDN7524GXTMA1 メーカー: Infineon および 2ED21064S06JXUMA1 メーカー: Infineon。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ 生産中仕様比較
| パラメータ | 2EDN7524GXTMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| ブランド | Infineon | Infineon |
| カテゴリ | Power MOSFET Drivers | Power MOSFET Drivers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.82 | $0.85 |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | 10 V to 20 V |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| 立ち上がり時間 | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| 立ち下がり時間 | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| 動作温度 | -40 C to +125 C | -40C to +125C |
| パッケージ | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-14 (14-pin SOIC) |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS ステータス | Compliant | ROHS3 Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| 機能 | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| トポロジー | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Bootstrap Diode | — | Integrated |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Negative Gate Drive Robustness | — | -0.7 V |