5CSEBA2U19I7SN vs 5CSEBA2U23A7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA2U19I7SN par Altera et 5CSEBA2U23A7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5CSEBA2U19I7SN | 5CSEBA2U23A7N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $65,96 | $99,50 |
| Device Type | Cyclone V SE FPGA system-on-chip (SoC) | — |
| Processor Core | Single ARM Cortex-A9 MPCore | — |
| Debug Technology | CoreSight | — |
| Logic Elements | 25K logic elements | 25,000 LE |
| Device Frequency | 800 MHz | — |
| I/O Count | 240 I/O | — |
| Boîtier | 484-UBGA | 672-UBGA (23x23 mm) |
| Package Dimensions | 19 mm x 19 mm | — |
| FPGA Architecture | Cyclone V SE | — |
| Type de montage | Surface mount | Surface Mount (BGA) |
| Integrated Processor | Yes | — |
| Logic Technology | Field-programmable gate array | — |
| Device Category | Embedded system-on-chip FPGA | — |
| Statut RoHS | unknown | Compliant (per ampheo listing) |
| REACH Status | unknown | — |
| AEC-Q100 Status | unknown | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Tension d'alimentation | [DATA_NEEDED: supply voltage range] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Type de mémoire | [DATA_NEEDED: memory type and capacity] | — |
| Family | — | Cyclone V SE SoC FPGA |
| MPN Code | — | 5CSEBA2U23A7N (Cyclone V SE A2, U23 package) |
| Hard Processor System (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 700 MHz |
| Process Technology | — | 28 nm low-power |
| User I/O | — | 188 |
| Speed Grade | — | 7 |
| Temperature Grade | — | A (Commercial, 0C to +85C) [DATA_NEEDED: exact junction range] |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Operating Voltage (Core) | — | 1.1 V (typical FPGA core, multi-rail HPS) |
| Configuration Scheme | — | HPS-boot of FPGA fabric via configuration QSPI |
| Embedded Memory | — | M10K blocks (count [DATA_NEEDED: exact M10K/M20K count]) |
| DSP Blocks | — | Variable-precision DSP (count [DATA_NEEDED: exact count]) |
| PLLs | — | Fractional PLLs (count [DATA_NEEDED: exact PLL count]) |